AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 306

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AMD-K6-IIIE+550ACR

Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AMD-K6-IIIE+550ACR

Lead Free Status / RoHS Status
Not Compliant
AMD-K6™-IIIE+ Embedded Processor Data Sheet
284
If INIT, INTR (if interrupts are enabled), FLUSH#, NMI, or
SMI# are sampled asserted in the EPM Stop Grant state, the
processor latches the edge-sensitive signals (INIT, FLUSH#,
NMI, and SMI#), but otherwise does not exit the EPM Stop
Grant state to service the interrupt. When the processor returns
to the Normal state, any pending interrupts are recognized. To
ensure their recognition, all of the normal requirements for
these input signals apply within the EPM Stop Grant state.
If RESET is sampled asserted in the EPM Stop Grant state, the
processor immediately returns to the Normal state and the
reset process begins.
Preliminary Information
Clock Control
23543A/0—September 2000
Chapter 14

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