AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 170

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

AMD-K6™-IIIE+ Embedded Processor Data Sheet
Processor State
Observability
Register (PSOR)
Figure 57. Processor State Observability Register (PSOR)—Low-Power Versions of the Processor
148
Symbol
63
NOL2
STEP
EBF
No L2 Functionality
Processor Stepping
Effective Bus Frequency Divisor
Reserved
Description
To support AMD PowerNow! technology, all low-power versions
of the AMD-K6-IIIE+ processor provide a different version of
the Processor State Observability Register (PSOR), as shown in
Figure 57 and fully described in this section. All standard-
power versions of the processor support the PSOR register as
defined on page 49. The PSOR register is MSR C000_0087h.
.
PBF[2:0] Field. This read-only field contains the BF divisor values
externally applied to the processor BF[2:0] pins. These input BF
values are sampled by the processor during the falling
transition of RESET.
Note: This BF divisor value may be different than the BF divisor
VID Field. This read-only field contains the Voltage ID bits driven
to the processor VID[4:0] pins at RESET. These bits are
initialized to 01010b and driven on the VID[4:0] pins at RESET.
Note: Low-power
NOL2 Bit. This read-only bit indicates whether the processor
contains an L2 cache. This bit is always set to 0 for the
AMD-K6-IIIE+ processor.
24
23
PBF[2:0]
value supplied to the processor’s internal PLL.
PowerNow! technology, which enables dynamic alteration of
the
Management
information on programming the VID[4:0] pins.
AMD PowerNow!™ Technology
21
Bits
8
7-4
2-0
Preliminary Information
20
processor’s
VID
AMD-K6-IIIE+
16
Register
15
core
Symbol
PBF
VID
voltage.
(EPMR)”
Pin Bus Frequency Divisor
Voltage ID
9
processors
Description
8
N
O
2
L
See
7
STEP
on
“Enhanced
23543A/0—September 2000
4
support
page 144
3
2
EBF[2:0]
Bits
20-16
23-21
Chapter 6
0
Power
AMD
for