LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 350

• Manufacturer Part Number: LPC1769FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1769FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4966; 935290522551

NXP Semiconductors
Table 314. CAN1 and CAN2 controller register map
[1]
[2]
UM10360
User manual
Generic
Name
BTR
EWL
SR
RFS
RID
RDA
RDB
TFI1
TID1
TDA1
TDB1
TFI2
TID2
TDA2
TDB2
TFI3
TID3
TDA3
TDB3
The error counters can only be written when RM in CANMOD is 1.
These registers can only be written when RM in CANMOD is 1.
Description
Bus Timing
Error Warning Limit
Status Register
Receive frame status
Received Identifier
Received data bytes 1-4
Received data bytes 5-8
Transmit frame info (Tx Buffer 1)
Transmit Identifier (Tx Buffer 1)
Transmit data bytes 1-4 (Tx Buffer 1)
Transmit data bytes 5-8 (Tx Buffer 1)
Transmit frame info (Tx Buffer 2)
Transmit Identifier (Tx Buffer 2)
Transmit data bytes 1-4 (Tx Buffer 2)
Transmit data bytes 5-8 (Tx Buffer 2)
Transmit frame info (Tx Buffer 3)
Transmit Identifier (Tx Buffer 3)
Transmit data bytes 1-4 (Tx Buffer 3)
Transmit data bytes 5-8 (Tx Buffer 3)
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Access Reset
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
[2]
[2]
[2]
[2]
[2]
[2]
value
0x1C0000
0x60
0x3C3C3C CAN1SR - 0x4004 401C
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Chapter 16: LPC17xx CAN1/2
CAN1 & 2 Register Name
& Address
CAN1BTR - 0x4004 4014
CAN2BTR - 0x4004 8014
CAN1EWL - 0x4004 4018
CAN2EWL - 0x4004 8018
CAN2SR - 0x4004 801C
CAN1RFS - 0x4004 4020
CAN2RFS - 0x4004 8020
CAN1RID - 0x4004 4024
CAN2RID - 0x4004 8024
CAN1RDA - 0x4004 4028
CAN2RDA - 0x4004 8028
CAN1RDB - 0x4004 402C
CAN2RDB - 0x4004 802C
CAN1TFI1 - 0x4004 4030
CAN2TFI1 - 0x4004 8030
CAN1TID1 - 0x4004 4034
CAN2TID1 - 0x4004 8034
CAN1TDA1 - 0x4004 4038
CAN2TDA1 - 0x4004 8038
CAN1TDB1- 0x4004 403C
CAN2TDB1 - 0x4004 803C
CAN1TFI2 - 0x4004 4040
CAN2TFI2 - 0x4004 8040
CAN1TID2 - 0x4004 4044
CAN2TID2 - 0x4004 8044
CAN1TDA2 - 0x4004 4048
CAN2TDA2 - 0x4004 8048
CAN1TDB2 - 0x4004 404C
CAN2TDB2 - 0x4004 804C
CAN1TFI3 - 0x4004 4050
CAN2TFI3 - 0x4004 8050
CAN1TID3 - 0x4004 4054
CAN2TID3 - 0x4004 8054
CAN1TDA3 - 0x4004 4058
CAN2TDA3 - 0x4004 8058
CAN1TDB3 - 0x4004 405C
CAN2TDB3 - 0x4004 805C
UM10360
© NXP B.V. 2010. All rights reserved.
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