LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 644

• Manufacturer Part Number: LPC1769FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1769FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4966; 935290522551

34.1 ARM Cortex-M3 User Guide: Introduction
UM10360
User manual
34.1.1 About the processor and core peripherals
The material in this appendix is provided by ARM Limited for inclusion in the User
Manuals of devices containing the Cortex-M3 CPU. Minimal changes have been
made to reflect implementation options and other distinctions that apply
specifically to LPC17xx devices.
The Cortex-M3 processor is a high performance 32-bit processor designed for the
microcontroller market. It offers significant benefits to developers, including:
The Cortex-M3 processor is built on a high-performance processor core, with a 3-stage
pipeline Harvard architecture, making it ideal for demanding embedded applications. The
processor delivers exceptional power efficiency through an efficient instruction set and
extensively optimized design, providing high-end processing hardware including
single-cycle 32x32 multiplication and dedicated hardware division.
Fig 140. Typical Cortex-M3 implementation
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UM10360
Chapter 34: Appendix: Cortex-M3 user guide
Rev. 2 — 19 August 2010
outstanding processing performance combined with fast interrupt handling
enhanced system debug with extensive breakpoint and trace capabilities
efficient processor core, system and memories
ultra-low power consumption with integrated sleep modes
platform security, with optional integrated memory protection unit (MPU).
All information provided in this document is subject to legal disclaimers.
WIC
Cortex-M3
processor
Rev. 2 — 19 August 2010
NVIC
Access
Debug
interface
Port
Code
Flash
patch
protection unit
Bus matrix
Processor
Memory
core
watchpoints
peripheral interface
Data
SRAM and
viewer
Serial
Trace Macrocell
Wire
Embedded
© NXP B.V. 2010. All rights reserved.
User manual
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