LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 98

• Manufacturer Part Number: LPC1769FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1769FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4966; 935290522551

NXP Semiconductors
Table 73.
UM10360
User manual
Symbol
P0[28] / SCL0 /
USB_SCL
P0[29] / USB_D +
P0[30] / USB_D −
P1[0] to P1[31]
P1[0] /
ENET_TXD0
P1[1] /
ENET_TXD1
P1[4] /
ENET_TX_EN
P1[8] /
ENET_CRS
P1[9] /
ENET_RXD0
P1[10] /
ENET_RXD1
P1[14] /
ENET_RX_ER
P1[15] /
ENET_REF_CLK
P1[16] /
ENET_MDC
P1[17] /
ENET_MDIO
Pin description
LQFP
100
24
29
30
95
94
93
92
91
90
89
88
87
86
…continued
LQFP
80
-
22
23
76
75
74
73
72
71
70
69
-
-
Type Description
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I/O
O
I/O
O
I/O
I
I/O
I
I/O
I
I/O
I
I/O
I
I/O
O
I/O
I/O
All information provided in this document is subject to legal disclaimers.
P0[28] — General purpose digital input/output pin. Open-drain 5 V tolerant
digital I/O pad, compatible with I
mode, 400 kHz Fast Mode, and 1 MHz Fast Mode Plus. This pad requires
an external pull-up to provide output functionality. When power is switched
off, this pin connected to the I
I
SCL0 — I
Section 19.1
USB_SCL — USB port I
P0[29] — General purpose digital input/output pin. Pad provides digital I/O
and USB functions. It is designed in accordance with the USB
specification, revision 2.0 (Full-speed and Low-speed mode only).
USB_D+ — USB bidirectional D+ line.
P0[30] — General purpose digital input/output pin. Pad provides digital I/O
and USB functions. It is designed in accordance with the USB
specification, revision 2.0 (Full-speed and Low-speed mode only).
USB_D− — USB bidirectional D − line.
Port 1: Port 1 is a 32-bit I/O port with individual direction controls for each
bit. The operation of port 1 pins depends upon the pin function selected via
the pin connect block. Pins 2, 3, 5, 6, 7, 11, 12, and 13 of this port are not
available.
P1[0] — General purpose digital input/output pin.
ENET_TXD0 — Ethernet transmit data 0.
P1[1] — General purpose digital input/output pin.
ENET_TXD1 — Ethernet transmit data 1.
P1[4] — General purpose digital input/output pin.
ENET_TX_EN — Ethernet transmit data enable.
P1[8] — General purpose digital input/output pin.
ENET_CRS — Ethernet carrier sense.
P1[9] — General purpose digital input/output pin.
ENET_RXD0 — Ethernet receive data.
P1[10] — General purpose digital input/output pin.
ENET_RXD1 — Ethernet receive data.
P1[14] — General purpose digital input/output pin.
ENET_RX_ER — Ethernet receive error.
P1[15] — General purpose digital input/output pin.
ENET_REF_CLK — Ethernet reference clock.
P1[16] — General purpose digital input/output pin.
ENET_MDC — Ethernet MIIM clock.
P1[17] — General purpose digital input/output pin.
ENET_MDIO — Ethernet MIIM data input and output.
2
Rev. 2 — 19 August 2010
C lines. Open-drain configuration applies to all functions on this pin.
2
C0 clock input/output (this pin uses a specialized I2C pad, see
for details).
2
C serial clock (OTG transceiver).
2
Chapter 7: LPC17xx Pin configuration
C-bus is floating and does not disturb the
2
C-bus specifications for 100 kHz standard
UM10360
© NXP B.V. 2010. All rights reserved.
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