LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 67

IC ARM CORTEX MCU 512K 100-LQFP

LPC1769FBD100,551

Manufacturer Part Number
LPC1769FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1769FBD100,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4966
935290522551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1769FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
UM10360
User manual
Table 47.
Bit
7:4
8
9
31:10 -
Symbol
CLKOUTDIV
CLKOUT_EN
CLKOUT_ACT
Clock Output Configuration register (CLKOUTCFG - 0x400F C1C8) bit description
All information provided in this document is subject to legal disclaimers.
Value Description
0000
0001
0010
...
1111
Rev. 2 — 19 August 2010
Integer value to divide the output clock by, minus one.
Clock is divided by 1.
Clock is divided by 2.
Clock is divided by 3.
...
Clock is divided by 16.
CLKOUT enable control, allows switching the CLKOUT
source without glitches. Clear to stop CLKOUT on the
next falling edge. Set to enable CLKOUT.
CLKOUT activity indication. Reads as 1 when CLKOUT is
enabled. Read as 0 when CLKOUT has been disabled via
the CLKOUT_EN bit and the clock has completed being
stopped.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Chapter 4: LPC17xx Clocking and power control
UM10360
© NXP B.V. 2010. All rights reserved.
67 of 840
Reset
value
0
0
0
NA

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