DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 211

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(5)
The pin function is switched as shown below according to the combination of the SCIFE bit in
HICR5 and the LPC4E bit in HICR4 of the LPC, LPC3E to LPC1E bits in HICR0, and the
P82DDR bit. LPCENABLE in the following table is expressed by the following logical
expression.
LPCENABLE = 1 : SCIFE + LPC4E + LPC3E + LPC2E + LPC1E
Module
Name
LPC
I/O port
(6)
The pin function is switched as shown below according to the combination of the register setting
of the LPC and the P81DDR bit.
Module
Name
LPC
I/O port
P82/CLKRUN
P81/GA20
Pin Function
CLKRUN output
P82 output
P82 input
(initial setting)
Pin Function
GA20 output
P81 output
P81 input
(initial setting)
Logical Expression
LPCENABLE
1
0
0
LPC
GA20_OE
1
0
0
Rev. 3.00 Sep. 28, 2009 Page 165 of 910
Setting
Setting
I/O Port
P82DDR
⎯
1
0
I/O Port
P81DDR
⎯
1
0
Section 7 I/O Ports
REJ09B0350-0300