DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 258

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 8 8-Bit PWM Timer (PWMU)
When the PWMnE bit (n = 0 to 5) in PWMCONB is set to 1, the PWMU outputs pulses that start
with a high level. The updated PWMREG value is written in REGLAT, and the updated
PWMPRE value is written in PRELAT.
When the REGLAT value is less than the duty counter value, the PWMU outputs a high level
(when direct output is selected). At each PWM clock timing, the duty counter is incremented.
When the clock generator counter is H'00, the PWM clock is generated by decrementing the
PRELAT value.
Figure 8.4 shows an example of duty counter and clock generator counter operation.
The following shows the duty counter value and PWMU output timing.
Rev. 3.00 Sep. 28, 2009 Page 212 of 910
REJ09B0350-0300
(When PWMPRE = H'01 and PWMREG = H'80 with φ/4 Selected as Count Clock Source)
φ
φ/4
Duty
counter
Clock generator
counter
PRELAT
REGLAT
PWMUO
Figure 8.4 Example of Duty Counter and Clock Generator Counter Operation
PWMUO
REGLAT
Duty counter
H'FF
H'00
Figure 8.5 Duty Counter Value and PWMU Output Timing
H'01
H'78
H'00
H'01
H'79
H'00
H'01
H'80
H'01
H'80
H'00
H'01
H'81
H'00