DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 642

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 LPC Interface (LPC)
Rev. 3.00 Sep. 28, 2009 Page 596 of 910
REJ09B0350-0300
Bit
4
3
Bit Name
FGA20E
SDWNE
Initial
Value
0
0
Slave Host Description
R/W
R/W
R/W
⎯
⎯
Fast Gate A20 Function Enable
Enables or disables the fast Gate A20 function. When
the fast Gate A20 is disabled, the normal Gate A20
can be implemented by firmware controlling P81
output.
0: Fast Gate A20 function disabled
1: Fast Gate A20 function enabled
LPC Software Shutdown Enable
Controls LPC interface shutdown. For details of the
LPC shutdown function, and the scope of initialization
by an LPC reset and an LPC shutdown, see section
19.4.4, LPC Interface Shutdown Function (LPCPD).
0: Normal state, LPC software shutdown setting
[Clearing conditions]
•
•
•
1: LPC hardware shutdown state setting enabled
[Setting condition]
Writing 1 after reading SDWNE = 0
Other function (input/output) of pin P81 is enabled
The internal state of GA20 output is initialized to 1
GA20 pin output is open-drain (external pull-up
resistor (Vcc) required)
enabled
Writing 0
LPC hardware reset or LPC software reset
LPC hardware shutdown release (rising edge of
LPCPD signal)
Hardware shutdown state when LPCPD signal is
low level