DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 705

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
20.3.1
There are eight 16-bit read-only ADDR registers, ADDRA to ADDRH, used to store the results of
A/D conversion. The ADDR registers which store a conversion result for each channel are shown
in table 20.3.
The 10-bit conversion data is stored in bits 15 to 6. The lower six bits are always read as 0.
The data bus between the CPU and the A/D converter is sixteen bits wide. The data can be read
directly from the CPU. ADDR must not be accessed in 8-bit units and must be accessed in 16-bit
units.
Table 20.3 Analog Input Channels and Corresponding ADDR
Channel Set 0 (CH3 = 0)
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
A/D Data Registers A to H (ADDRA to ADDRH)
Analog Input Channel
Channel Set 1 (CH3 = 1)
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
A/D Data Register to Store A/D
Conversion Results
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
Rev. 3.00 Sep. 28, 2009 Page 659 of 910
Section 20 A/D Converter
REJ09B0350-0300

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