DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 290

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
Table 10.4 CCLR2 to CCLR0 (channel 0)
Notes: 1. Synchronous operation setting is performed by setting the SYNC bit in TSYR to 1.
Table 10.5 CCLR2 to CCLR0 (channels 1 and 2)
Notes: 1. Synchronous operation setting is performed by setting the SYNC bit in TSYR to 1.
Rev. 3.00 Sep. 28, 2009 Page 244 of 910
REJ09B0350-0300
Channel
0
Channel
1, 2
2. When TGRC or TGRD is used as a buffer register. TCNT is not cleared because the
2. Bit 7 is reserved in channels 1 and 2. It is always read as 0 and cannot be modified.
buffer register setting has priority, and compare match/input capture dose not occur.
Bit 7
CCLR2
0
1
Bit 7
Reserved*
0
2
Bit 6
CCLR1
0
1
0
1
Bit 6
CCLR1
0
1
Bit 5
CCLR0
0
1
0
1
0
1
0
1
Bit 5
CCLR0
0
1
0
1
Description
TCNT clearing disabled (Initial value)
TCNT cleared by TGRA compare
match/input capture
TCNT cleared by TGRB compare
match/input capture
TCNT cleared by counter clearing for
another channel performing
synchronous/clearing synchronous
operation*
TCNT clearing disabled
TCNT cleared by TGRC compare
match/input capture*
TCNT cleared by TGRD compare
match/input capture*
TCNT cleared by counter clearing for
another channel performing synchronous
clearing/synchronous operation*
Description
TCNT clearing disabled
TCNT cleared by TGRA compare
match/input capture
TCNT cleared by TGRB compare
match/input capture
TCNT cleared by counter clearing for
another channel performing synchronous
clearing/synchronous operation*
1
2
2
1
1