DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 265

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI has an on-chip 14-bit pulse-width modulator (PWM) timer with two output channels. It
can be connected to an external low-pass filter to operate as a 14-bit D/A converter.
9.1
• Division of pulse into multiple base cycles to reduce ripple
• Eight resolution settings
• Two base cycle settings
• Sixteen operation clocks (by combination of eight resolution settings and two base cycle
Figure 9.1 shows a block diagram of the PWM (D/A) module.
The resolution can be set to 1, 2, 64, 128, 256, 1024, 4096, or 16384 system clock cycles.
The base cycle can be set equal to T × 64 or T × 256, where T is the resolution.
settings)
[Legend]
DACR:
DADRA:
DADRB:
DACNT:
PCSR:
PCSR
PWX0
PWX1
Features
PWMX D/A control register (6 bits)
PWMX D/A data register A (15 bits)
PWMX D/A data register B (15 bits)
PWMX D/A counter (14 bits)
Peripheral clock select register
Select clock
Section 9 14-Bit PWM Timer (PWMX)
Control
logic
Figure 9.1 PWMX (D/A) Block Diagram
Internal clock
Base cycle compare match A
Fine–adjustment pulse addition A
Base cycle compare match B
Fine–adjustment pulse addition B
φ
φ/2, φ/64, φ/128, φ/256,
φ/1024, φ/4096, φ/16384
Base cycle overflow
Clock
Comparator A
Comparator B
DACNT
DACR
Rev. 3.00 Sep. 28, 2009 Page 219 of 910
Section 9 14-Bit PWM Timer (PWMX)
DADRA
DADRB
Internal data bus
Module data bus
Bus interface
REJ09B0350-0300