DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 848

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 25 List of Registers
Rev. 3.00 Sep. 28, 2009 Page 802 of 910
REJ09B0350-0300
Register Name
Timer control register_Y
Keyboard matrix interrupt register
Timer control/status register_X
Timer control/status register_Y
Pull-up MOS control register
Input capture register R
Time constant register A_Y
Input capture register F
Time constant register B_Y
Keyboard matrix interrupt register A KMIMRA
Timer counter _X
Timer counter _Y
Time constant register C
Time constant register A_X
Time constant register B_X
Timer connection register I
Timer connection register S
Abbreviation
TCR_Y
KMIMR
TCSR_X
TCSR_Y
KMPCR
TICRR
TCORA_Y
TICRF
TCORB_Y
TCNT_X
TCNT_Y
TCORC
TCORA_X
TCORB_X
TCONRI
TCONRS
Number
of bits
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Address
H'FFF0
(RELOCATE = 0)
(RELOCATE = 0)
H'FFF1
H'FFF1
(RELOCATE = 0)
H'FFF2
(RELOCATE = 0)
(RELOCATE = 0)
(RELOCATE = 0)
(RELOCATE = 0)
H'FFF4
H'FFF4
(RELOCATE = 0)
H'FFF6
H'FFF7
H'FFF1
H'FFF2
H'FFF2
H'FFF3
H'FFF3
H'FFF3
H'FFF5
H'FFFC
H'FFFE
Module
TMR_X
TMR_X
TMR_X
TMR_X,
TMR_Y
INT
TMR_Y
PORT
TMR_X
TMR_Y
TMR_X
TMR_Y
INT
TMR_Y
TMR_X
TMR_X
TMR_X
TMR_Y
8
Data
Width
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
2
2
Access
States
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

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