DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 343

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.8
10.8.1
The input clock pulse width must be at least 1.5 states in the case of single-edge detection, and at
least 2.5 states in the case of both-edge detection. The TPU will not operate properly with a
narrower pulse width. In phase counting mode, the phase difference and overlap between the two
input clocks must be at least 1.5 states, and the pulse width must be at least 2.5 states. Figure
10.43 shows the input clock conditions in phase counting mode.
10.8.2
When counter clearing by compare match is set, TCNT is cleared in the final state in which it
matches the TGR value (the point at which the count value matched by TCNT is updated).
Consequently, the actual counter frequency is given by the following formula:
Where f: Counter frequency
Figure 10.43 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
TCLKA
(TCLKC)
TCLKB
(TCLKD)
φ: Operating frequency
N: TGR set value
f = ————
Notes: Phase difference and overlap
Usage Notes
Input Clock Restrictions
Caution on Period Setting
(N + 1)
Pulse width
φ
Overlap
Pulse width
Phase
differ-
ence
Overlap
: 1.5 states or more
: 2.5 states or more
Phase
differ-
ence
Pulse width
Pulse width
Rev. 3.00 Sep. 28, 2009 Page 297 of 910
Section 10 16-Bit Timer Pulse Unit (TPU)
Pulse width
REJ09B0350-0300

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