DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 383

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
3
2
1
Bit Name
ICPF
CMF
CKSEG
Initial
Value
0
0
0
R/W
R/(W)*
R/(W)*
R/(W)*
Description
Input Capture Generation
In timer mode, this flag indicates that the value in TDPCNT
was transferred to TDPICR when an input capture signal
was generated. This flag is set when the input capture
signal selected by the IEDG bit is generated on the
TDPCYI input pin.
In cycle measurement mode, this flag indicates that the
value in TDPCNT was transferred to TDPICR when the
rising or falling edge of the PWM waveform was detected.
[Setting condition]
•
[Clearing condition]
•
Compare Match Flag (valid only in timer mode)
[Setting condition]
•
[Clearing condition]
•
Note: In cycle measurement mode, even though the
External Clock Edge Select
When CKS2 to CKS0 in TDPCR1 are set to B'111
(external clock), this bit selects the edge for counting of the
external count clock edges.
0: Falling edges of the external clock are counted
1: Rising edges of the external clock are counted
When an input capture signal is generated
Reading ICPF when ICPF = 1 and then writing 0 to
ICPF
When the TDPCNT value matches the TDPWDMX
value in timer mode
Reading CMF when CMF = 1 and then writing 0 to
CMF
TDPCNT value matches the TDPWDMX value, CMF
is not set to 1.
Section 12 16-Bit Duty Period Measurement Timer (TDP)
Rev. 3.00 Sep. 28, 2009 Page 337 of 910
REJ09B0350-0300