DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 813

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

For operating modes after the reset state is cancelled, this LSI has four power-down operating
modes in which power consumption is significantly reduced. In addition, there is also module stop
mode in which reduced power consumption can be achieved by individually stopping on-chip
peripheral modules.
• Medium-speed mode
• Sleep mode
• Watch mode
• Software standby mode
• Module stop mode
24.1
Power-down modes are controlled by the following registers. To access SBYCR, LPWRCR,
SYSCR2, MSTPCRH, and MSTPCRL the FLSHE bit in the serial timer control register (STCR)
must be cleared to 0. For details on STCR, see section 3.2.3, Serial Timer Control Register
(STCR). For details on the PSS bit in TSCR_1 (WDT_1), see TCSR_1 in section 13.3.5, Timer
Control/Status Register (TCSR).
Table 24.1 Register Configuration
Register Name
Standby control register
Low power control register
Module stop control register H MSTPCRH
Module stop control register L MSTPCRL
Module stop control register A MSTPCRA
Module stop control register B MSTPCRB
System clock frequency for the CPU operation can be selected as φ/2, φ/4, φ/8, φ/16 or φ/32.
The CPU stops but on-chip peripheral modules continue operating.
The CPU stops but on-chip peripheral module WDT_1 continue operating.
The clock pulse generator stops, and the CPU and on-chip peripheral modules stop operating.
Independently of above operating modes, on-chip peripheral modules that are not used can be
stopped individually.
Register Descriptions
Section 24 Power-Down Modes
SBYCR
Abbreviation
LPWRCR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value Address
H'00
H'00
H'3F
H'FF
H'FC
H'FF
Rev. 3.00 Sep. 28, 2009 Page 767 of 910
Section 24 Power-Down Modes
H'FF84
H'FF85
H'FF86
H'FF87
H'FE7E
H'FE7F
REJ09B0350-0300
8
8
Data Bus
Width
8
8
8
8