DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 597

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.4.7
The interrupt request flag (IRIC) is set at different times depending on the WAIT bit in ICMR, the
FS bit in SAR, and the FSX bit in SARX. If the ICDRE or ICDRF flag is set to 1, SCL is
automatically held low after one frame has been transferred in synchronization with the internal
clock. Figures 17.18 to 17.20 show the IRIC set timing and SCL control.
IRIC Setting Timing and SCL Control
When WAIT = 0, and FS = 0 or FSX = 0 (I
User processing
User processing
SCL
SDA
IRIC
SCL
SDA
IRIC
Figure 17.18 IRIC Setting Timing and SCL Control (1)
(a) Data transfer ends with ICDRE = 0 at transmission, or ICDRF = 0 at reception.
(b) Data transfer ends with ICDRE = 1 at transmission, or ICDRF = 1 at reception.
7
7
7
7
8
8
8
8
2
C bus format, no wait)
A
A
9
9
Clear IRIC
Clear IRIC
1
1
Write to ICDR (transmit)
or read from ICDR (receive)
Rev. 3.00 Sep. 28, 2009 Page 551 of 910
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2
Section 17 I
3
1
1
3
2
Clear IRIC
C Bus Interface (IIC)
REJ09B0350-0300