DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 395

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
(3)
Stoppage for an external event (TDPCYI) can be determined from the timer overflow flag. There
are two types of such stoppage.
Stoppage for an external event can be considered to have occurred when the timer overflows
within the period from the start of cycle measurement mode to the detection of the first edge
(rising or falling, as selected by the POCTL bit in TDPCR1).
Figure 12.10 shows an example of the timing of this type of stoppage for an external event.
When any of the TWDMXOVF, TWDMNUDF, TPDMXOVF, and TPDMNUDF flags is set to 1
while the CPSPE bit in TDPCR1 is 1, cycle measurement stops. Thereafter, when the
corresponding flag is cleared, cycle measurement restarts. When the timer overflows before the
first edge is detected after the restart of cycle measurement, it is possible to determine stoppage for
an external event.
Figure 12.11 shows an example of the timing for this type of stoppage for an external event.
φ
TDPCYI
CPSPE
TDPCNT
OVF
TWDMXOVF/TWDMNUDF/
TPDMXOVF/TPDMNUDF
Determination of External Event (TDPCYI) Stoppage
φ
TDPCYI
TDPMDS
TDPCNT
OVF
TWDMXOVF/TWDMNUDF/
TPDMXOVF/TPDMNUDF
Figure 12.10 Example of Timing for Stoppage for an External Event (1)
Figure 12.11 Example of Timing for Stoppage for an External Event (2)
H'5555
H'0000
Restart of measurement
H'0000
H'FFFF
H'FFFF
H'0000
Section 12 16-Bit Duty Period Measurement Timer (TDP)
Stoppage for an external event can be determined.
Stoppage for an external event can be determined
H'0000
Rev. 3.00 Sep. 28, 2009 Page 349 of 910
N
Start of measurement
Start of measurement
H'0000
N
H'0000
H'0001
REJ09B0350-0300
H'0001
H'0002

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