DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 357

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
11.3.6
TCMCSR is an 8-bit readable/writable register that controls operation of the interrupt sources.
Bit
7
6
5
4
Bit Name
OVF
MAXOVF
CMF
CKSEG
TCM Status Register (TCMCSR)
Initial
Value
0
0
0
0
R/W
R/(W)* Timer Overflow
R/(W)* Measurement Period Upper Limit Overflow
R/(W)* Compare Match Flag (only valid in timer mode)
R/W
Description
This flag indicates that the TCMCNT has overflowed.
[Setting condition]
Overflow of TCMCNT (change in value from H'FFFF to
H'0000)
[Clearing condition]
Reading OVF when OVF = 1 and then writing 0 to OVF.
This flag indicates that the measured number of cycles of
the waveform for measurement in cycle measurement mode
has reached the upper limit set in TCMMLCM, causing an
overflow.
[Setting condition]
A greater value for TCMICR than TCMMLCM
[Clearing condition]
Reading MAXOVF when MAXOVF = 1 and then writing 0 to
MAXOVF
[Setting condition]
When the values in TCMCNT and TCMMLCM match.
[Clearing condition]
Reading CMF when CMF = 1 and then writing 0 to CMF
Note: CMF is not set in cycle measurement mode, even
When bits CKS2 to CKS0 in TCMCR are set to B'111, this
bit selects the edge for counting of external count clock
edge.
0: Count falling edges of the external clock.
1: Count rising edges of the external clock.
External Clock Edge Select
when the values in TCMCNT and TCMMLCM match.
Section 11 16-Bit Cycle Measurement Timer (TCM)
Rev. 3.00 Sep. 28, 2009 Page 311 of 910
REJ09B0350-0300

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