DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 639

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.3
The LPC has the following registers.
Table 19.2 Register Configuration
Register Name
Host interface control register 0
Host interface control register 1
Host interface control register 2
Host interface control register 3
Host interface control register 4
Host interface control register 5
LPC channel 1 address register H
LPC channel 1 address register L
LPC channel 2 address register H
LPC channel 2 address register L
LPC channel 3 address register H
LPC channel 3 address register L
LPC channel 4 address register H
LPC channel 4 address register L
Input data register 1
Input data register 2
Input data register 3
Input data register 4
Output data register 1
Output data register 2
Output data register 3
Output data register 4
Status register 1
Status register 2
Status register 3
Status register 4
Register Descriptions
Abbreviation Slave Host
HICR0
HICR1
HICR2
HICR3
HICR4
HICR5
LADR1H
LADR1L
LADR2H
LADR2L
LADR3H
LADR3L
LADR4H
LADR4L
IDR1
IDR2
IDR3
IDR4
ODR1
ODR2
ODR3
ODR4
STR1
STR2
STR3
STR4
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 3.00 Sep. 28, 2009 Page 593 of 910
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
W
W
W
W
R
R
R
R
R
R
R
R
Section 19 LPC Interface (LPC)
Initial
Value Address
H'00
H'00
⎯
⎯
H'00
H'00
H'00
H'60
H'00
H'62
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'FE40
H'FE41
H'FE42
H'FE43
H'FDD9
H'FE33
H'FDC0
H'FDC1
H'FDC2
H'FDC3
H'FE34
H'FE35
H'FDD4
H'FDD5
H'FE38
H'FE3C
H'FE30
H'FDD6
H'FE39
H'FE3D
H'FE31
H'FDD7
H'FE3A
H'FE3E
H'FE32
H'FDD8
REJ09B0350-0300
Data Bus
Width
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8