DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 347

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.8.8
If the input capture signal is generated in the T
operation takes precedence and the write to TGR is not performed. Figure 10.49 shows the timing
in this case.
10.8.9
If the input capture signal is generated in the T
operation takes precedence and the write to the buffer register is not performed. Figure 10.50
shows the timing in this case.
Conflict between TGR Write and Input Capture
Conflict between Buffer Register Write and Input Capture
φ
Address
Write signal
Input capture
signal
TCNT
TGR
Figure 10.49 Conflict between TGR Write and Input Capture
2
2
TGR write cycle
state of a TGR write cycle, the input capture
state of a buffer register write cycle, the buffer
T1
TGR address
M
T2
Rev. 3.00 Sep. 28, 2009 Page 301 of 910
Section 10 16-Bit Timer Pulse Unit (TPU)
M
REJ09B0350-0300

Related parts for DF2117VLP20V