DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 295

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.3.3
The TIOR registers control the TGR registers. The TPU has four TIOR registers, two each for
channels 0, and one each for channels 1 and 2. Care is required since TIOR is affected by the
TMDR setting. The initial output specified by TIOR is valid when the counter is stopped (the CST
bit in TSTR is cleared to 0). Note also that, in PWM mode 2, the output at the point at which the
counter is cleared to 0 is specified. When TGRC or TGRD is designated for buffer operation, this
setting is invalid and the register operates as a buffer register.
• TIORH_0, TIOR_1, TIOR_2
• TIORL_0
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
IOB3
IOB2
IOB1
IOB0
IOA3
IOA2
IOA1
IOA0
Bit Name
IOD3
IOD2
IOD1
IOD0
IOC3
IOC2
IOC1
IOC0
Timer I/O Control Register (TIOR)
Initial
value
0
0
0
0
0
0
0
0
Initial
value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
I/O Control B3 to B0
Specify the function of TGRB.
I/O Control A3 to A0
Specify the function of TGRA.
Description
I/O Control D3 to D0
Specify the function of TGRD.
I/O Control C3 to C0
Specify the function of TGRC.
Rev. 3.00 Sep. 28, 2009 Page 249 of 910
Section 10 16-Bit Timer Pulse Unit (TPU)
REJ09B0350-0300

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