DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 519

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• FDLL
Baud rate = (Clock frequency input to baud rate generator) / (16 × divisor value)
16.3.6
FIER is a register that enables or disables interrupts. It is accessible when the DLAB bit in FLCR
is 0.
Bit
7 to 0
Bit
7 to 4
3
2
1
0
Bit Name
Bit 7 to
bit 0
Bit Name
⎯
EDSSI
ELSI
ETBEI
ERBFI
Interrupt Enable Register (FIER)
Initial Value
All 0
Initial Value
All 0
0
0
0
0
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
Section 16 Serial Communication Interface with FIFO (SCIF)
Description
Lower 8 bits of divisor latch
Description
Reserved
This bit is always read as 0 and cannot be modified.
Modem Status Interrupt Enable
0: Modem status interrupt disabled
1: Modem status interrupt enabled
Receive Line Status Interrupt Enable
0: Receive line status interrupt disabled
1: Receive line status interrupt enabled
FTHR Empty Interrupt Enable
0: FTHR empty interrupt disabled
1: FTHR empty interrupt enabled
Receive Data Ready Interrupt Enable
A character timeout interrupt is included when the
FIFO is enabled.
0: Receive data ready interrupt disabled
1: Receive data ready interrupt enabled
Rev. 3.00 Sep. 28, 2009 Page 473 of 910
REJ09B0350-0300