DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 45

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.9 Protection ........................................................................................................................... 724
22.10 Switching between User MAT and User Boot MAT ......................................................... 727
22.11 Programmer Mode ............................................................................................................. 728
22.12 Standard Serial Communication Interface Specifications for Boot Mode ......................... 728
22.13 Usage Notes ....................................................................................................................... 757
Section 23 Clock Pulse Generator .....................................................................759
23.1 Oscillator............................................................................................................................ 760
23.2 Duty Correction Circuit ..................................................................................................... 764
23.3 Subclock Input Circuit ....................................................................................................... 764
23.4 Subclock Waveform Forming Circuit ................................................................................ 765
23.5 Clock Select Circuit ........................................................................................................... 765
23.6 Usage Notes ....................................................................................................................... 766
Section 24 Power-Down Modes ........................................................................767
24.1 Register Descriptions ......................................................................................................... 767
24.2 Mode Transitions and LSI States ....................................................................................... 774
24.3 Medium-Speed Mode......................................................................................................... 776
24.4 Sleep Mode ........................................................................................................................ 777
24.5 Software Standby Mode..................................................................................................... 777
24.6 Watch Mode....................................................................................................................... 779
24.7 Module Stop Mode ............................................................................................................ 780
24.8 Usage Notes ....................................................................................................................... 780
22.8.1 Boot Mode ............................................................................................................ 702
22.8.2 User Program Mode.............................................................................................. 706
22.8.3 User Boot Mode.................................................................................................... 715
22.8.4 Storable Areas for On-Chip Program and Program Data...................................... 719
22.9.1 Hardware Protection ............................................................................................. 724
22.9.2 Software Protection............................................................................................... 725
22.9.3 Error Protection..................................................................................................... 725
23.1.1 Connecting Crystal Resonator .............................................................................. 760
23.1.2 External Clock Input Method................................................................................ 761
23.6.1 Notes on Resonator ............................................................................................... 766
23.6.2 Notes on Board Design ......................................................................................... 766
24.1.1 Standby Control Register (SBYCR) ..................................................................... 768
24.1.2 Low-Power Control Register (LPWRCR) ............................................................ 770
24.1.3 Module Stop Control Registers H, L, A, and B
24.8.1 I/O Port Status....................................................................................................... 780
24.8.2 Current Consumption when Waiting for Oscillation Stabilization ....................... 780
(MSTPCRH, MSTPCRL, MSTPCRA, MSTPCRB) ............................................ 771
Rev. 3.00 Sep. 28, 2009 Page xliii of xliv
REJ09B0350-0300