TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 108

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
3.7.4
Note:
TA01RUN
TA01MOD
TA1REG
INTETA01
TA01RUN
Operation in Each Mode
(1) 8-bit timer mode
X: Don’t care, − : No change
registers.
a.
Example: To generate an INTTA1 interrupt every 12 µs at fc = 27 MHz, set each
The input clocks for TMRA0 and TMRA1 are different from as follows.
TMRA0: TA0IN input, φ T1, φ T4 or φ T16
TMRA1: Match output of TMRA0, φ T1, φ T16, φ T256
Both TMRA0 and TMRA1 can be used independently as 8-bit interval timers.
Setting its function or counter data for TMRA0 and TMRA1 after stop these
Generating interrupts at a fixed interval (Using TMRA1)
TMRA1 then set the operation mode, input clock and a cycle to TA01MOD and
TA1REG register, respectively. Then, enable the interrupt INTTA1 and start
TMRA1 counting.
MSB
← –
← 0
← 0
← X
← –
To generate interrupts at constant intervals using TMRA1 (INTTA1), first stop
Select the input clock using Table 3.7.2.
7
* Clock state
register as follows:
6
0
0
1
X
5
X
X
1
0
X
4
X
X
0
1
X
3
1
1
1
2
0
0
91C016-106
0
1
1
X
0
LSB
0
X
0
Clock gear:
Stop TMRA1 and clear it to 0.
Select 8-bit timer mode and select φ T1 (0.3 µ s at fc = 27
MHz) as the input clock.
Set TA1REG to 12 µ s ÷ φ T1 = 40 = 28H
Enable INTTA1 and set it to level 5.
Start TMRA1 counting.
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TMP91C016
2008-02-20

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