TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 115
![no-image](/images/manufacturer_photos/0/6/668/toshiba_sml.jpg)
TMP91xy16FG
Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP91XY16FG.pdf
(282 pages)
Specifications of TMP91xy16FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
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TA0REG-WR
φT16
φT1
φT4
TA01RUN<TA0RDE>
TA01MOD<TA0CLK1:0>
(4) 8-bit PWM (Pulse width modulation) output mode
(INTTA0 interrupt)
TA0REG and
resolution of 8 bits can be output.
be used as an 8-bit timer.
timer register TA0REG or when 2
TA01MOD<PWM01:00>). The up counter UC0 is cleared when 2
occurs.
Selector
UC0 match
This mode is only valid for TMRA0. In this mode, a PWM pulse with the maximum
When TMRA0 is used the PWM pulse is output on the TA1OUT pin. TMRA1 can also
The timer output is inverted when the up counter (UC0) matches the value set in the
The following conditions must be satisfied before this PWM mode can be used.
Figure 3.7.17 shows a block diagram representing this mode.
TA1OUT
overflow
Selector
2
Value set in TA0REG < Value set for 2
Value set in TA0REG ≠ 0
n
Figure 3.7.17 Block Diagram of 8-Bit PWM Mode
Shift trigger
Figure 3.7.16 8-Bit PWM Waveforms
Internal data bus
8-bit up counter
Register buffer
Comparator
TA0REG
(UC 0)
91C016-113
TA01RUN<TA0RUN>
n
Clear
overflow
counter overflow occurs (n = 6, 7 or 8 as specified by
control
2
n
Overflow
(PWM cycle)
TA01MOD
<PWM01:00>
t
PWM
n
counter overflow
TA1OUT
TAFF1
Invert
n
TA1FFCR
<TA1FFIE>
counter overflow
INTTA0
TMP91C016
2008-02-20
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