TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 192

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
LCDFFP
(0364H)
LCDCTL2
(0366H)
Note: Please write bit<7:5> to 111, even if you use <RAMBUS>,<AC1> and <AC0> as initilal setting.
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
and display registers of external RAM built-in sequential access type
becomes active when accesses corresponding address.
external access.Table 3.13.3 shows the address map in the case of controlling RAM built-in
random access type
These registers do not exist on TMP91C016. These are image for instruction registers
Address as follows is assigned to these registers, and the following chip enable pin
And, the area of these address is external area, so
This selection is performed by LCDCTL<MMULCD>.
LCDC0L/LCDC0H/LCDC1L/LCDC1H/LCDC2L/LCDC2H/LCDR0L/LCDR0H Register
R/W
FP7
Always write to 111 (Note)
D7
7
7
7
0
R/W
FP6
D6
(Note)
6
6
6
0
Figure 3.13.2 LCDC Register
LCD driver.
Depend on the specification of external LCD driver
Depend on the specification of external LCD driver
Depend on the specification of external LCD driver
R/W
FP5
D5
5
5
0
5
LCDCTR2 Register
LCDFFP Register
91C016-190
Setting bit 7 to 0 for f
FP4
D4
4
4
4
R/W
0
FP3
D3
3
3
3
FP
RD
0: Byte
1: Word
RAMBUS
,
R/W
FP2
D2
2
2
2
0
WR
terminal becomes active by
00: Type A
01: Type B
10: Type C
11: Reserve
R/W
AC1
FP1
D1
1
1
1
0
(Note)
LCD driver.
R/W
AC0
FP0
TMP91C016
D0
0
0
0
0
2008-02-20

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