TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 83

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

3.5.9
Port D (PD0 to PD4, PD6, PD7)
resistor by setting 1 data correspond bit of PDUE register. Port D0 to D4 become to input
with pull-up resistor and port D6, D7 become to input without pull-up resistor by reset
operation.
D2BLP, D3BFR, DLEBCD, DOFFB), RTC alarm output (
(
(1) PD0 (D1BSCP), PD1 (D2BLP), PD2 (D3BFR), PD3 (DLEBCD), PD7 (MLDALM)
MLDALM
ALARM
Port D is 7-bit general-purpose I/O port. And port D0 to D4, D6, D7 can be set pull-up
Resetting set to 1 data for output latch of this port.
Except I/O port function, this port have also function LCD controller output (DIBSCP,
Above setting is set by writing data to PDFC register. Only port D6 have two functions
Reset
,
).
MLDALM
Pull-up resistor control
Direction control
(on bit basis)
Output latch
(on bit basis)
PD write
Function
control
PD read
(on bit basis)
PDUE write
PDCR write
PDFC write
S
) and this setting by PD<PD6> register’s data.
Figure 3.5.26 Port D0 to D3, D7
Y
S
B
A
91C016-81
D1BSCP, D2BLP, D3BFR
DLEBCD, MLDALM
A
B
S
Y
ALARM
), MLD output (MLDALM,
P-ch (Programmable pull up)
PD0 (D1BSCP)
PD1 (D2BLP)
PD2 (D3BFR)
PD3 (DLEBCD)
PD7 (MLDALM)
TMP91C016
2008-02-20