TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 264

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

Symbol
MAMR0
MAMR1
BEXCS
MSAR0
MSAR1
B0CS
B1CS
B2CS
B3CS
(4) Chip select/wait control (1/2)
Block 0
CS/WAIT
control
register
Block 1
CS/WAIT
control
register
Block 2
CS/WAIT
control
register
Block 3
CS/WAIT
control
register
External
CS/WAIT
control
register
Memory
start
address
register 0
Memory
address
mask
register 0
Memory
start
address
register 1
Memory
address
mask
register 1
Name
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
RMW)
RMW)
RMW)
RMW)
RMW)
C0H
C1H
C2H
C3H
C7H
C8H
C9H
CAH
CBH
0: Disable
1: Enable
0: Disable
1: Enable
0: Disable
1: Enable
0: Disable
1: Enable
B0E
B1E
B2E
B3E
S23
V20
S23
V21
W
W
W
W
7
0
0
1
0
1
1
1
1
0: 16 M
1: Area
Area
setting
B2M
S22
V19
S22
V20
W
6
0
1
1
1
1
91C016-262
CS0 area size
CS1 area size 0: Enable to address comparison
00: ROM/SRAM
01:
10:
11:
00: ROM/SRAM
01:
10:
11:
00: ROM/SRAM
01:
10:
11:
00: ROM/SRAM
01: Reserved
10: DRAMC
11: Reserved
B0OM1
B1OM1
B2OM1
B3OM1
S21
V18
S21
V19
W
W
W
W
5
0
0
0
0
1
1
1
1
Reserved
Reserved
Reserved
Start address A23 to A16
Start address A23 to A16
B0OM0
B1OM0
B2OM0
B3OM0
0: Enable to address comparison
S20
V17
S20
V18
W
W
W
W
4
0
0
0
0
1
1
1
1
R/W
R/W
R/W
R/W
0: 16 bits
1: 8 bits
0: 16 bits
1: 8 bits
0: 16 bits
1: 8 bits
0: 16 bits
1: 8 bits
0: 16 bits
1: 8 bits
Data bus
width
Data bus
width
Data bus
width
Data bus
width
Data bus
width
BEXBUS
B0BUS
B1BUS
B2BUS
B3BUS
S19
V16
S19
V17
W
W
W
W
W
3
0
0
0
0
0
1
1
1
1
000: 2 waits
001: 1 wait
010: (1 + N) waits 110: 4 waits
011: 0 waits
000: 2 waits
001: 1 wait
010: (1 + N) waits 110: 4 waits
011: 0 waits
000: 2 waits
001: 1 wait
010: (1 + N) waits 110: 4 waits
011: 0 waits
000: 2 waits
001: 1 wait
010: (1 + N) waits 110: 4 waits
011: 0 waits
000: 2 waits
001: 1 wait
010: (1 + N) waits 110: 4 waits
011: 0 waits
BEXW2
B0W2
B1W2
B2W2
B3W2
S18
V15
S18
V16
W
W
W
W
W
2
0
0
0
0
0
1
1
1
1
V14 to 9
V15 to 9
BEXW1
B0W1
B1W1
B2W1
B3W1
S17
S17
W
W
W
W
W
1
0
0
0
0
0
1
1
1
1
100: Reserved
101: 3 waits
111: 8 waits
100: Reserved
101: 3 waits
111: 8 waits
100: Reserved
101: 3 waits
111: 8 waits
100: Reserved
101: 3 waits
111: 8 waits
100: Reserved
101: 3 waits
111: 8 waits
TMP91C016
2008-02-20
BEXW0
B0W0
B1W0
B2W0
B3W0
S16
S16
V8
V8
W
W
W
W
W
0
0
0
0
0
0
1
1
1