TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 64

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
3.5.4
Port 6 (P60, P61, P63 to P67)
(
signal output function (
special command for Sift Register type (LCLK), and special signals for dynamic RAM
access function (
set by P6FC and P6FC2 register. Resetting resets all bits of P6CR, P6FC, P6FC2, and 3, 6,
7 bits of P6UE to 0 and 0, 1, 4, 5 bits of P6UE to 1. And P63, P66, P67 set to cut off
resistance, P60, P61, P64, P65 set to pull-up resistance input mode.
resistance and port function)
CS0
Port 6 is 7-bit I/O port. This I/O port have standard chip select signal output function
Selection of
,
control (on bit basis)
Function control 2
Direction control
Fuction control
CS1
(on bit basis)
(on bit basis)
(on bit bais)
Pull-up resistor
P6UDE write
P6CR write
P6FC2 write
P6FC write
Output
P6 write
Reset
latch
,
S
CS3
CS2
), expand address signal output function (EA24, EA25), expand chip select
RAS
and
,
CAS
A
B
C
CS2A
CS2B
,
Figure 3.5.7 Port 6
WE
S
,
is set by P6FC<P62F>. (This terminal don’t have pull-up
CS2C
91C016-62
,
LCAS
), clock output for LCDD (VEECLK), chip select for
Output buffer
P6 read
,
UCAS
,
LDS
,
UDS
,
REFOUV
P-ch (Programmable pull up)
P60 (
P61 (
P63 (
P64 (EA24,
P65 (EA25,
P66 (
P67 (
CS0 , CS1 , CS3 , EA24, EA25,
UCAS or WE , LCAS or REFOUT
RAS , CS2B , CS2C or VEECLK,
UDS , LDS
CS0
CS1
CS3
UCAS
LCAS
),
),
,
). These function is
RAS
or
CS2B
CS2C
or
REFOUT
WE
),
),
, LCLK, VEECLK),
,
TMP91C016
UDS
2008-02-20
,
LDS
),
)

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