TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 201

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
TMP91C016
Note: Other circuit is necessary for LCD drive power supply for LCD driver display.
D2BLP
DLEBCD
D1BSCP
D3BFR
DOFF
D7 to D0
a.
Figure 3.13.8 Interface Example for Shift Register Type LCD Driver
Common
Setting example: In case of use 240 seg × 240 com, 8-bit bus width LCD driver.
Relation display panel and display memory (in case of above setting)
VDD
119
240
VSS
LD
LD
LD
LD
LD
LD
1
2
3
D0 D1 D2 D3 D4 D5 D6 D7
1
In case of store 7200 bytes transfer data to LCD
driver in built-in RAM (1000H to 2c1FH).
T6C13B
2 3
(240-row driver selection)
4
101eh
1000h
(PDCR), 1FH
(LCDSAL), 11H
(LCDSAH), 00H
(LCDSIZE), 96H
(LCDFFP), 308
(LCDCTL), 81H
5
DI7 to DI0
6
VDD
VSS
DIR
TEST
DUAL
SCP
S/C
VCCL/R, V0L/R,
V1L/R, V4L/R,
V5L/R
7
8
9 10 11 …
VSS
1001h
91C016-199
O240
O001
Open
; Setting control terminal
; Select SR mode
; Source start address = 1000H
; 240 seg × 240 com
; f
; Byte mode FP = 70.93 Hz,
; LCDON, Transfer start
FP
VSS
VDD
= 70.93 Hz
DSPOF
COM240
SCP
LP
FR
DI7 to DI0
EIO1
EIO2
COM001
T6C13B
(240-column driver selection)
101dh
2c1fh
240COM × 240SEG
Segment
239 240
LCD
TMP91C016
2008-02-20

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