TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 209

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

3.13.4.4 RAM Built-in Type LCD Driver Control Mode (RAM mode)
executed LCDC outputs chip select signal to LCD driver connected to the outside from
control pin (D1BSCP etc.). Therefore control of data transmission numbers
corresponding to LCD size is controlled by instruction of CPU. There are 2 kinds of
addresses of LCD driver in this case, and which is chosen determines by LCDCTL
<MMULCD> register.
display data register in LCD driver at the time of <MMULCD> = 0. Please make the
transmission place address at this time into either of FE0H to FE7FH. (Figure 3.13.2
references)
= 1.
3C0000H to 3FFFFF to four area for every 64 Kbytes. (Figure 3.13.2 references)
Figure 3.13.6 (1) at the time below. [<MMULCD> = 0]
a.
Data transmission to LCD driver is executed by move instruction of CPU.
After setting mode of operation to control register, when move instruction of CPU is
It corresponds to LCD driver which has every 1 byte of instruction register and
It corresponds to address direct writing type LCD driver at the time of <MMULCD>
The transmission place address at this time can also assign the memory area of
The example of a setting is shown as follows and connection example is shown in
Setting example: In case of use 80 seg × 65 com LCD driver.
function of micro DMA by soft start in setting of display data.
Assign external column driver to LCDC0 and row driver to LCDR0.
This example used LD instruction in setting of instruction and used burst
; Setting external terminal
; Setting for mode of LCDC0/LCDR0
; Setting for micro DMA and INTTC (ch0)
LD
LD
LD
LD
LD
LD
LDC
LD
LDC
LD
LDC
LD
LDC
LD
EI
LD
LD
In case of store 650 bytes transfer data to LCD
driver in built-in RAM (1000H to 1289H).
(PDCR), 19H
(LCDSAL), 00H
(LCDCTL), 80H
(LCDC0L), XX
(LCDR0L), XX
A, 08H
DMAM0, A
WA,650
DMAC0, WA
XWA, 1000H
DMAS0, XWA
XWA, 0FE1H
DMAD0, XWA
(INTETC01), 06H ; INTTC0 level = 6
6
(DMAB), 01H
(DMAR), 01H
91C016-207
;
;
; Setting for
; Setting for LCDC
; Select RAM mode
; LCDON
; Setting instruction for LCDC0
; Setting instruction for LCDR0
; Source address INC mode
;
; Count = 650
;
; Source address = 1000H
;
; Destination address = FE1H (LCDC0H)
;
;
; Burst mode
; Soft start
CE
LE
for LCDC0: D1BSCP,
for LCDR0: DLEBCD,
DOFF
TMP91C016
2008-02-20