TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 85

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
PD
(0029H)
PDCR
(002BH)
PDFC
(002AH)
PDUE
(002CH)
Note: Read-modify-write is prohibited for PDCR, PDFC and PDUE.
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
0: Port
1: MLDALM
PD7C
0: Input 1: Output
PD7U
PD7F
PD7
Pull-up resistor
7
7
7
7
0: Disable
1: Enable
R/W
W
W
W
0
0
0
0: Port
1:
<PD6> = 1
1:
at <PD6> =
0
MLDALM
ALARM
PD6C
PD6U
PD6F
PD6
6
6
6
6
at
Port D Pull-up Resistor Control Register
Data from external port (Output latch register is set to 1)
Figure 3.5.29 Port D Register
write “0”
Always
Port D Function Register
Port D Control Register
W
5
5
5
5
0
Port D Register
91C016-83
0: Port
1: DOFFB
PD4C
PD4F
PD4U
PD4
4
4
4
4
0: Port
1: DLEBCD
PD3C
PD3U
PD3F
PD3
3
3
3
3
0: Input
Pull-up resistor
0: Port
1: D3BFR
0: Disable
1: Enable
PD2C
PD2U
PD2F
PD2
R/W
W
W
W
2
2
2
2
0
0
1
1: Output
0: Port
1: D2BLP
PD1C
PD1U
PD1F
PD1
1
1
1
1
0: Port
1: D1BSCP
PD0C
PD0F
PD0U
PD0
TMP91C016
0
0
0
0
2008-02-20

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