TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 189

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

3.13.1
The number of picture
elements can be handled
Receiver data bus width
Transfer data bus width
Transfer rate
(at f
External
pins
FPH
= 16 [MHz])
Feature of LCDC of Each Mode
Each feature and operation of pin is as follows.
Data bus:
(D7 to D0)
Write strobe:
(
Address bus:
(A0)
Shift clock
pulse:
(D1BSCP)
Latch pulse:
(D2BLP)
Frame:
(D3BFR)
Cascade pulse:
(DLEBCD)
Display OFF:
(
WR
DOFF
)
)
Table 3.13.1 Feature of LCDC of Each Mode
Common (Row): 64, 68, 80, 100, 120,
Segment (Column): 32, 64, 80, 120, 128,
8 bits,16 bits selectable
8 bits, 4 bits,1 bit selectable
250 ns/1 byte
375 ns/1 byte
1125 ns/1 byte at Bit mode
Data bus; Connect with DI pin of column
driver. Upper 7 pins do not use in Bit mode
and upper 4 pins do not use in Nibble mode.
Not used
Not used
Shift clock pulse; Connect with SCP pin of
column driver. LCD driver latches data bus
value by falling edge of this pin.
Latch pulse output; Connect with LP/EIO1 pin
of column/row driver. Display data is latched
in output buffer in LCD driver by rising edge of
this pin.
LCD frame output; Connect with FR pin of
column/row driver.
Cascade pulse output; Connect with DIO1 pin
of row driver. This pin outputs 1 shot pulse by
every D3BFR pin changes.
Display off output; Connect with
L means display off and H means display on.
Shift- Register Type LCD Driver
Control Mode
128, 144, 160, 200, 240
at Byte mode
at Nibble mode
91C016-187
160, 240, 320, 360
DSPOF
terminal of column/row driver.
There is not a limitation
8 bits,16 bits, selectable
(Depend on CPU command)
8 bits fixed
Equal to memory cycle
Data bus; Connect with DB pin of
column/row driver.
Write strobe; Connect with
column/row driver.
Address 0; Connect with D/I pin of
column driver.
When A0 = 1 data bus value means
display data, when A0 = 0 data bus
means instruction data.
Chip enable for column driver 1;
Connect with
1.
Chip enable for column driver 2;
Connect with
2.
Chip enable for column driver 3;
Connect with
3.
Chip enable for row driver;
Connect with
RAM Built-in Type LCD Driver
Control Mode
LE
CE
CE
CE
pin of row driver.
pin of column driver
pin of column driver
pin of column driver
WR
TMP91C016
2008-02-20
pin of