TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 114

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
Example: To generate 1/4-duty 50-kHz pulses (at fc = 27 MHz):
TA01RUN
TA01MOD
TA0REG
TA1REG
TA1FFCR
P7CR
P7FC
TA01RUN
X: Don’t care, −: No change
Calculate the value which should be set in the timer register.
To obtain a frequency of 50 kHz, the pulse cycle t should be: t = 1/50 kHz = 20 µs
φT1 = (2
Therefore set TA1REG to 67 (43H)
The duty is to be set to 1/4: t × 1/4 = 20 µs × 1/4 = 5 µs
Therefore, set TA0REG = 17 = 11H.
← 0
← 1
← 0
← 0
← X
← X
← –
← 1
7
* Clock state
20 µs/(2
5 µs/(2
6
X
0
0
1
X
X
X
3
/fc) s (at 27 MHz);
20 µs
5
X
X
0
0
X
X
X
3
4
X
X
1
0
X
X
X
/fc) s ≈ 17
3
/fc) s ≈ 67
3
X
0
0
0
2
0
X
0
0
1
1
91C016-112
1
0
0
0
1
1
1
0
0
1
1
1
X
1
1
1
Clock gear:
Stop TMRA0 and TMRA01 and clear it to 0.
Set the 8-bit PPG mode, and select φT1 as input clock.
Write 11H
Write 43H
Set TA1FF, enabling both inversion and the double buffer.
Writing 10 provides negative logic pulse.
Set P70 as the TA1OUT pin.
Start TMRA0 and TMRA01 counting.
1/1
TMP91C016
2008-02-20

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