TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 272

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

DMEMCR
Symbol Name Address
DREFCR
Symbol Name Address
WDMOD
WDCR
(9) DRAM control
(10) Watchdog timer
DRAM
function
control
DRAM
memory
control
WDT
MODE
register
WD
control
(Prohibit
(Prohibit
RMW)
RMW)
300H
301H
430H
431H
0: Disable
1: Dummy
Dummy
cycle
1: WDT
Self
-refresh
0: Self
1: Release
-refresh
cycle
SRFC
enable
WDTE
R/W
DMI
R/W
W
7
0
1
7
1
00: 2
01: 2
Always
Refresh-cycle insetsion interval
write 0
WDTP1
RS2
R/W
R/W
R/W
6
0
0
-
6
15
17
0
/f
/f
SYS,
SYS,
000: 31 states
001: 110 states
010: 220 states
011: 450 states
100: 900 states
101: 1200 states
110: 1800 states
111: 2700 states
91C016-270
Always
10: 2
11: 2
write 0
RS1
R/W
R/W
WDTP0
5
0
0
-
R/W
5
19
21
B1H: WDT disable
0
/f
/f
SYS
SYS
Memory
access
control
0: Normal
1: Slow
MACM
RS0
R/W
R/W
4
0
0
4
W
Multiplex
address
0: Disable
1: Enable
−
−
MUXE
RW2
R/W
R/W
4EH: WDT clear
3
0
0
3
Refresh-cycle width
000: 2 states
001: 3 states
010: 4 states
011: 5 states
100: 6 states
101: 7 states
110: 8 states
111: 9 states
Multiplex address length
00: 8 bits
01: 9 bits
10: 10 bits
11: 11 bits
MUXW1
IDLE2
0: Stop
1: Run
RW1
R/W
R/W
I2WDT
2
R/W
0
0
2
0
1: RESET
MUXW0
RESCR
connect
internally
WDT out
pin to
RESET
pin
RW0
R/W
R/W
R/W
1
0
0
1
0
TMP91C016
2008-02-20
0: Disable
1: Enable
Refresh-
cycle
Memory
access
control
0: Disable
1: Enable
Always
write 0
MAC
R/W
R/W
R/W
RC
0
0
0
0
−
0