TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 94

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

(6) Procedure for setting chip select/wait control
Example:
order:
enable/disable status for
signal using one of these pins, set the corresponding bit in the port 6 function register
P6FC to 1.
address, the CPU accesses the internal address area and no chip select signal is output
on any of the
width is set to 16 bits and the number of waits is set to 0.
1.
2.
3.
When using the chip select/wait control function, set the registers in the following
Set the chip select output waveform, data bus width, number of waits and master
The CS0 to CS3 pins can also function as pins P60 to P63. To output a chip select
If a CS0 to CS3 address is specified which is actually an internal I/O and RAM area
In this example CS0 is set to be the 64-Kbyte area 010000H to 01FFFFH. The bus
MSAR0 = 01H ............... Start address: 010000H
MAMR0 = 07H .............. Address area: 64 Kbytes
B0CS = 83H................... ROM/SRAM, 16-bit data bus, 0 waits, CS0 area settings
Set the memory start address registers MSAR0 to MSAR3.
Set the start addresses for CS0 to CS3.
Set the memory address mask registers MAMR0 to MAMR3.
Set the sizes of CS0 to CS3.
Set the chip select/wait control registers B0CS to B3CS.
CS0
to
CS3
CS0
pins.
91C016-92
to
CS3
.
TMP91C016
2008-02-20