TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 190

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
CPU address bus:
Internal data bus
System clock
CPU BUSAK
output
3.13.2
A0 to 23
32 kHz clock
timer out
TA3 OUT
Internal
data bus
Internal
data bus
Block Diagram
To interrupt circuit
LCDSAH/L
COM register
register (10 bits)
SCP
generate
FP register
SEG register
SR,<BUS1:0>
EMCCR4
<TA3LCDE>
Figure 3.13.1 LCDC Block Diagram
Lower address
Increment (14 bits)
SEG
counter (9 bits)
BCD generate
FR generate
COM counter
LP generate
Comparator
Shift register
(Inc. 14 bits)
<BUS1:0>
<Bus1:0>
Clear
91C016-188
Selector
SEGEND
<Start>
R
S
Q
SCPEN
LP modify
RD,<BUS1:0>
Latch,
shifter
MMU
SCPEN and
BUSRQ
RD
D3BFR
DLEBCD
D1BSCP
D2BLP
A0 to A23
D0 to D7
TMP91C016
2008-02-20

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