TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 197

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

BUSRQ (Internal)
D3BFR
DLEBCD
D2BLP
D1BSCP
D7~D0
D3BFR
DLEBCD
D2BLP
D1BSCP
D7~D0
LCLK mode (Only write)
Note: When LCLK mode selected, CS signal out OR gate (Original CS signal and
Normal CS signal
CS signal is not ouptut when read.
1
Figure 3.13.7 Timing Diagram for SR Mode (Detail)
A23 to A0
f
FP
2
= 78.02 Hz (at <FP1:0> = 00)
Figure 3.13.6 Timing Diagram for SR Mode
CLK
Figure 3.13.5 LCLK Mode Timing Chart
1 picture (120 com)
display time
Data transmission
(240 seg = 30 bytes) of
volume of 1 com
t
SCP
3
N
= 2
Address
states
t
N+1
STOP
91C016-195
:
Stop time
120
N+28
t
LP
N+29
1
: LP period
Address + 1
2
t
ti
OPR
:
CPU operating
3
XT = 1/32768 [s]
1
state
WR
= 1/f
/ HWR signal).
SYS
t
LPH
[s]
120
TMP91C016
= 0.5XT
2008-02-20
1
2