TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 30

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TMP91xy16FG

Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy16FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
(4) Runaway provision with SFR protection register
(Purpose)
Specified SFR list
(Operation explanation)
(Double key)
runaway prevents that it is it in the state which is fetch impossibility by stopping
of clock, memory control register (CS/WAIT controller, MMU) is changed.
possible by setting up a double key to EMCCR1 and EMCCR2 register.
executed with protection ON state.
1. CS/WAIT controller
2. MMU
3. Clock gear
4. DFM
5. PORT
6. DRAMC
Provision in runaway of program by noise mixing.
Write operation to specified SFR is prohibited so that provision program in
And error handling in runaway becomes easy by INTP0 interruption.
Execute and release of protection (Write operation to specified SFR) become
1st-KEY: Succession writes in 5AH at EMCCR1 and A5H at EMCCR2
2nd-KEY: Succession writes in A5H at EMCCR1 and 5AH at EMCCR2
A state of protection can be confirmed by reading EMCCR0<PROTECT>.
By reset, protection becomes OFF.
And INTP0 interruption occurs when write operation to specified SFR was
B0CS, B1CS, B2CS, B3CS, BEXCS,
MSAR0, MSAR1, MSAR2, MSAR3,
MAMR0, MAMR1, MAMR2, MAMR3
LOCAL0/1/2/3
SYSCR0, SYSCR1, SYSCR2, EMCCR0, EMCCR3
DFMCR0, DFMCR1
P2FC, P5CR, P5FC, P5FC2, P6CR, P6FC, P6FC2
P7CR, P7FC, P7FC2, PDCR, PDFC
DREFCR, DMEMCR
91C016-28
TMP91C016
2008-02-20

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