TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 279

• Manufacturer Part Number: TMP91xy16FG
• Manufacturer: Toshiba

Specifications of TMP91xy16FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: -
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 31
• Power Supply Voltage(v): 2.7 to 3.6

Symbol Name Address
VLDCR0
VLDCR1
VLDCR2
HPCTST1
HPCTST2
VLDCTL
(16) HPLT, VLD
VLD
mode
control
register 0
VLD
mode
control
register 1
VLD
mode
control
register 2
VLD
control
register
HPLT
function
register 1
HPLT
function
register 2
(Prohibit
(Prohibit
(Prohibit
RMW)
RMW)
440H
441H
RMW)
449H
445H
446H
442H
0: Detection
1: Detection
0: Detection
1: Detection
0:
1: Detect
Voltage
detection
start flag
Voltage
detection
start flag
Voltage
detection
start flag
Always
write 0
off
on
off
on
Detection
off
on
V0EN
V1EN
V2EN
R/W
R/W
R/W
R/W
7
0
0
0
0
-
ion
Detect
level flag
0: Over
1: Below
Always
write 0
Always
write 0
Always
write 0
Always
write 0
LHSEL
1.5 V
1.4 V
R/W
R/W
R/W
R/W
R/W
6
0
0
0
0
0
-
-
-
Interrupt
permission
flag
0: Interrupt
1: Interrupt
Interrupt
permission
flag
0: Interrupt
1: Interrupt
0: Interrupt
1: Interrupt
0: Run
1: Run
Interrupt
permission
flag
VLD2
91C016-277
INT0EN
INT1EN
INT2EN
SAM_2
off
on
off
on
off
on
continually
intermit-
tently
TIM21
R/W
R/W
R/W
R/W
R/W
5
0
0
0
0
sampling time
0
VLD2
0: Voltage
1: Voltage
0: Voltage
1: Voltage
0: Run
1: Run
Comparison
result of
voltage
detection
(Read-clear
-write)
0: Voltage
1: Voltage
Comparison
result of
voltage
detection
(Read-clear
-write)
Comparison
result of
voltage
detection
(Read-clear
-write)
VLD1
VLD0IN
VLD1IN
VLD2IN
SAM_1
normal
decline
normal
decline
continually
intermit-
tently
normal
decline
TIM20
R/W
R/W
R/W
R/W
R/W
4
0
0
0
0
0
0: Vcc drive
1: Vref drive
0: Run
1: Run
The register of voltage detection level
LHSEL = 0: 12 levels (00H to 0BH)
LHSEL = 1: 6 levels
18 levels (Total) can be set
Always
write 0
Always
write 0
VLD0
XT1SEL
SAM_0
continually
intermit-
tently
TIM11
R/W
R/W
R/W
R/W
R/W
R/W
V03
3
0
0
0
0
0
sampling time
0
-
-
VLD1
0: VLD no
1: VLD use
The register setting of voltage
detection level
5 levels (00H to 04H) can be set
Always
write 0
Always
write 0
VLD2USE VLD1USE VLD0USE
use
TIM10
R/W
R/W
R/W
R/W
R/W
R/W
V02
V12
2
0
0
0
0
0
0
-
-
0: VLD no
1: VLD use
The register setting of
voltage detection level
2 levels (00H to 02H)
can be set
Always
write 0
use
TIM01
R/W
R/W
R/W
R/W
R/W
R/W
V01
V11
V21
1
sampling time
0
0
0
0
0
0
-
TMP91C016
VLD0
2008-02-20
0: VLD no
1: VLD use
Always
write 0
use
TIM00
R/W
R/W
R/W
R/W
R/W
R/W
V00
V10
V20
0
0
0
0
0
0
0
-