HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 116

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 4 Exception Handling
4.2.3
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).
4.2.4
After reset release, MSTPCRA to MSTPCRC are initialized to H'3F, H'FF, and H'FF, respectively,
and all modules except the DTC enter module stop mode. Consequently, on-chip supporting
Rev. 5.00 Jan 10, 2006 page 90 of 1042
REJ09B0275-0500
(1) (3) Reset exception handling vector address (when reset, (1) = H'000000,
(2) (4) Start address (contents of reset exception handling vector address)
(5)
(6)
Interrupts after Reset
State of On-Chip Supporting Modules after Reset Release
RES
Internal
address bus
Internal read
signal
Internal write
signal
Internal data
bus
(3) = H'000002)
Start address ((5) = (2) (4))
First program instruction
Figure 4.3 Reset Sequence (Modes 6 and 7)
(1)
Vector fetch
(2)
High
(4)
(3)
processing
Internal
first program
Prefetch of
instruction
(5)
(6)

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