HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 564

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 15 Controller Area Network (HCAN)
15.2.8
The abort acknowledge register (ABACK) is a 16-bit readable/writable register containing status
flags that indicate normal cancellation (aborting) of a mailbox (buffer) transmit messages.
Note:
Bits 15 to 9 and 7 to 0—Abort Acknowledge Register (ABACK7 to ABACK1, ABACK15 to
ABACK8): These bits indicate that a transmit message in the corresponding mailbox has been
canceled (aborted) normally.
Bit x
ABACKx
0
1
Bit 8—Reserved: This bit always reads 0. The write value should always be 0.
Rev. 5.00 Jan 10, 2006 page 538 of 1042
REJ09B0275-0500
Initial value:
Initial value:
ABACK
* Can only be written with 1 for flag clearing.
Abort Acknowledge Register (ABACK)
[Clearing condition]
Writing 1
Completion of transmit message cancellation for corresponding mailbox
Description
R/W:
R/W:
Bit:
Bit:
ABACK15 ABACK14 ABACK13 ABACK12 ABACK11 ABACK10 ABACK9 ABACK8
ABACK7 ABACK6 ABACK5 ABACK4 ABACK3 ABACK2 ABACK1
R/(W) *
R/(W) *
15
0
7
0
R/(W) *
R/(W) *
14
0
6
0
R/(W) *
R/(W) *
13
0
5
0
R/(W) *
R/(W) *
12
0
4
0
R/(W) *
R/(W) *
11
0
3
0
R/(W) *
R/(W) *
10
0
2
0
R/(W) *
R/(W) *
9
0
1
0
(Initial value)
R/(W) *
R
8
0
0
0

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