HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 925

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

PFCR—Pin Function Control Register
Bit
Initial value
Read/Write
Notes: 1. In expanded mode with ROM, bits AE3 to AE0 are initialized to B'0000.
BUZZ output enable
0 Functions as PF1 I/O pin
1
Functions as BUZZ output pin
:
:
:
2. This bit is valid only in the H8S/2626 Group; in the H8S/2623 Group, 0 must be
Address output enable
0
1
In ROMless expanded mode, bits AE3 to AE0 are initialized to B'1101.
Address pins A0 to A7 are made address outputs by setting the corresponding
DDR bits to 1.
written to this bit.
R/W
—
7
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
R/W
—
6
0
A8–A23 address output disabled
A8 address output enabled; A9–A23 address output disabled
A8, A9 address output enabled; A10–A23 address output disabled
A8–A10 address output enabled; A11–A23 address output disabled
A8–A11 address output enabled; A12–A23 address output disabled
A8–A12 address output enabled; A13–A23 address output disabled
A8–A13 address output enabled; A14–A23 address output disabled
A8–A14 address output enabled; A15–A23 address output disabled
A8–A15 address output enabled; A16–A23 address output disabled
A8–A16 address output enabled; A17–A23 address output disabled
A8–A17 address output enabled; A18–A23 address output disabled
A8–A18 address output enabled; A19–A23 address output disabled
A8–A19 address output enabled; A20–A23 address output disabled
A8–A20 address output enabled; A21–A23 address output disabled
A8–A21 address output enabled; A22, A23 address output disabled
A8–A23 address output enabled
BUZZE
R/W
0
5
*2
R/W
—
4
0
H'FDEB
Rev. 5.00 Jan 10, 2006 page 899 of 1042
1/0
R/W
AE3
3
*1
Appendix B Internal I/O Register
1/0
AE2
R/W
2
*1
MCU, Bus Controller
R/W
AE1
REJ09B0275-0500
1
0
1/0
R/W
AE0
0
*1