HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 12

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

2.9
2.10 Usage Note........................................................................................................................ 72
Section 3 MCU Operating Modes
3.1
3.2
3.3
3.4
3.5
Section 4 Exception Handling
4.1
4.2
4.3
4.4
4.5
4.6
Rev. 5.00 Jan 10, 2006 page x of xxiv
2.8.5
2.8.6
Basic Timing ..................................................................................................................... 66
2.9.1
2.9.2
2.9.3
2.9.4
2.9.5
2.10.1 TAS Instruction.................................................................................................... 72
Overview........................................................................................................................... 73
3.1.1
3.1.2
Register Descriptions ........................................................................................................ 75
3.2.1
3.2.2
3.2.3
Operating Mode Descriptions ........................................................................................... 79
3.3.1
3.3.2
3.3.3
3.3.4
Pin Functions in Each Operating Mode ............................................................................ 80
Address Map in Each Operating Mode ............................................................................. 80
Overview........................................................................................................................... 85
4.1.1
4.1.2
4.1.3
Reset.................................................................................................................................. 88
4.2.1
4.2.2
4.2.3
4.2.4
Traces................................................................................................................................ 91
Interrupts ........................................................................................................................... 92
Trap Instruction................................................................................................................. 93
Stack Status after Exception Handling.............................................................................. 94
Bus-Released State............................................................................................... 65
Power-Down State ............................................................................................... 65
Overview.............................................................................................................. 66
On-Chip Memory (ROM, RAM) ......................................................................... 66
On-Chip Supporting Module Access Timing ...................................................... 68
On-Chip HCAN Module Access Timing ............................................................. 70
External Address Space Access Timing .............................................................. 72
Operating Mode Selection ................................................................................... 73
Register Configuration......................................................................................... 74
Mode Control Register (MDCR) ......................................................................... 75
System Control Register (SYSCR) ...................................................................... 75
Pin Function Control Register (PFCR) ................................................................ 77
Mode 4 ................................................................................................................. 79
Mode 5 ................................................................................................................. 79
Mode 6 ................................................................................................................. 79
Mode 7 ................................................................................................................. 79
Exception Handling Types and Priority............................................................... 85
Exception Handling Operation............................................................................. 86
Exception Vector Table ....................................................................................... 86
Overview.............................................................................................................. 88
Reset Sequence .................................................................................................... 88
Interrupts after Reset............................................................................................ 90
State of On-Chip Supporting Modules after Reset Release ................................. 90
......................................................................................... 85
.................................................................................. 73