HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 683

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Notes: 1. Preprogramming (setting erase block data to all "0") is not necessary.
2. Verify data is read in 16-bit (W) units.
3. Set only one bit in EBR1 and 2. More than 2 bits cannot be set.
4. Erasing is performed in block units. To erase a number of blocks, each block must be erased in turn.
Increment
address
Figure 19.12 Erase/Erase-Verify Flowchart
NG
NG
Set block start address to verify address
H'FF dummy write to verify address
Clear ESU1 bit in FLMCR1
*4
Clear SWE1 bit in FLMCR1
Set SWE1 bit in FLMCR1
Set ESU1 bit in FLMCR1
Clear EV1 bit in FLMCR1
Clear E1 bit in FLMCR1
Set EV1 bit in FLMCR1
Set E1 bit in FLMCR1
Last address of block?
tcswe: Wait ( 1) s
Verify data = all "1"?
erasing of all erase
tsswe: Wait (x) s
tsesu: Wait (y) s
tcesu: Wait ( ) s
tsevr: Wait ( ) s
Set EBR1 and 2
tcev: Wait ( ) s
tsev: Wait ( ) s
tse: Wait (z) ms
Read verify data
tce: Wait ( ) s
End of erasing
Enable WDT
Disable WDT
blocks?
End of
n = 1
Start
OK
OK
OK
*1
NG
*3
Start erase
Halt erase
*2
Rev. 5.00 Jan 10, 2006 page 657 of 1042
Clear SWE1 bit in FLMCR1
Clear EV1 bit in FLMCR1
tcswe: Wait ( 1) s
tcev: Wait ( ) s
Erase failure
Section 19 ROM (Preliminary)
n
(N)?
OK
REJ09B0275-0500
NG
n
n + 1

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