HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 716

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 20 Clock Pulse Generator
Bit 2
SCK2
0
1
20.2.2
LPWRCR is an 8-bit readable/writable register that performs power-down mode control.
LPWRCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized by a
manual reset or in software standby mode.
Bits 7 to 2—Reserved: The function of these bits differs between the H8S/2623 Group and
H8S/2626 Group.
For details see sections 21A.2.3, 21B.2.3, Low-Power Control Register (LPWRCR).
Bits 1 and 0—Frequency Multiplication Factor (STC1, STC0): The STC bits specify the
frequency multiplication factor of the PLL circuit.
Bit 1
STC1
0
1
Rev. 5.00 Jan 10, 2006 page 690 of 1042
REJ09B0275-0500
Bit
Initial value
Read/Write
Low-Power Control Register (LPWRCR)
Bit 1
SCK1
0
1
0
1
Bit 0
STC0
0
1
0
1
DTON
R/W
Bit 0
SCK0
0
1
0
1
0
1
7
0
Description
Setting prohibited
1
2
4
LSON
R/W
Description
Bus master is in high-speed mode
Medium-speed clock is /2
Medium-speed clock is /4
Medium-speed clock is /8
Medium-speed clock is /16
Medium-speed clock is /32
6
0
NESEL
R/W
5
0
SUBSTP
R/W
4
0
RFCUT
R/W
3
0
R/W
2
0
STC1
R/W
1
0
(Initial value)
(Initial value)
STC0
R/W
0
0

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