HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 356

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
Input Capture Function: The TCNT value can be transferred to TGR on detection of the TIOC
pin input edge.
Rising edge, falling edge, or both edges can be selected as the detected edge. For channels 0, 1, 3,
and 4, it is also possible to specify another channel’s counter input clock or compare match signal
as the input capture source.
Note: When another channel’s counter input clock is used as the input capture input for channels
Rev. 5.00 Jan 10, 2006 page 330 of 1042
REJ09B0275-0500
Example of input capture operation setting procedure
Figure 10.12 shows an example of the input capture operation setting procedure.
<Input capture operation>
Select input capture input
0 and 3, /1 should not be selected as the counter input clock used for input capture input.
Input capture will not be generated if /1 is selected.
Figure 10.12 Example of Input Capture Operation Setting Procedure
Input selection
Start count
[1]
[2]
[1] Designate TGR as an input capture register by
[2] Set the CST bit in TSTR to 1 to start the count
means of TIOR, and select rising edge, falling
edge, or both edges as the input capture source
and input signal edge.
operation.