HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 339

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Channel
4
Channel
5
Bit 3
IOA3
0
1
Bit 3
IOA3
0
1
Bit 2
IOA2
0
1
0
1
Bit 2
IOA2
0
1
*
Bit 1
IOA1
0
1
0
1
0
1
*
Bit 1
IOA1
0
1
0
1
0
1
Bit 0
IOA0 Description
0
1
0
1
0
1
0
1
0
1
*
*
Bit 0
IOA0 Description
0
1
0
1
0
1
0
1
0
1
*
TGR4A
is output
compare
register
TGR4A
is input
capture
register
TGR5A
is output
compare
register
TGR5A
is input
capture
register
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCA4 pin
Capture input
source is TGR3A
compare match/
input capture
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCA5 pin
Rev. 5.00 Jan 10, 2006 page 313 of 1042
Section 10 16-Bit Timer Pulse Unit (TPU)
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at generation
of TGR3A compare match/
input capture
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
REJ09B0275-0500
(Initial value)
(Initial value)
*: Don’t care
*: Don’t care