HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 234

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 8 Data Transfer Controller (DTC)
Table 8.9
The number of execution states is calculated from the formula below. Note that
of all transfers activated by one activation event (the number in which the CHNE bit is set to 1,
plus 1).
For example, when the DTC vector address table is located in on-chip ROM, normal mode is set,
and data is transferred from the on-chip ROM to an internal I/O register, the time required for the
DTC operation is 14 states. The time from activation to the end of the data write is 11 states.
Rev. 5.00 Jan 10, 2006 page 208 of 1042
REJ09B0275-0500
Bus width
Access states
Execution
status
Object to be Accessed
Number of execution states = I · (S
Vector read
Register
information
read/write
Byte data read
Word data read
Byte data write
Word data write
Internal operation
Number of States Required for Each Execution Status
S
S
S
S
S
S
S
I
J
K
K
L
L
M
Chip
RAM
On-
32
1
1
1
1
1
1
I
+ 1) +
ROM
Chip
On-
16
1
1
1
1
1
1
(J · S
On-Chip I/O
Registers
8
2
2
4
2
4
J
+ K · S
16
2
2
2
2
2
K
1
+ L · S
2
4
2
4
2
4
External Devices
L
8
) + M · S
6+2m
6+2m
6+2m
3+m
3+m
3
means the sum
M
2
2
2
2
2
2
16
3+m
3+m
3+m
3+m
3+m
3

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